FPGA Development in VHDL - Beyond the Basics
| 文件类型 | 收录时间 | 最后活跃 | 资源热度 | 文件大小 | 文件数量 |
|---|---|---|---|---|---|
| 视频 | 2025-6-10 19:50 | 2025-6-23 14:34 | 32 | 515.06 MB | 45 |
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文件列表
- 07.Testing Your Designs/01.Overview.mp41.08MB
- 04.Monitoring Signal States with Attributes/01.Overview.mp41.13MB
- 07.Testing Your Designs/05.Summary.mp41.14MB
- 03.Working with Custom Data Types/09.Summary.mp41.19MB
- 06.Constructing State Machines/03.State Machine Types.mp41.25MB
- 06.Constructing State Machines/01.Overview.mp41.33MB
- 03.Working with Custom Data Types/01.Overview.mp41.33MB
- 04.Monitoring Signal States with Attributes/02.What Are Attributes.mp41.36MB
- 05.Keeping Code Organized with Subprograms and Packages/01.Overview.mp41.4MB
- 04.Monitoring Signal States with Attributes/06.Type Kind Attributes.mp41.41MB
- 02.Developing for the FPGA/02.Module Overview.mp41.5MB
- 05.Keeping Code Organized with Subprograms and Packages/07.Summary.mp41.54MB
- 06.Constructing State Machines/07.Summary.mp41.77MB
- 02.Developing for the FPGA/08.Summary.mp41.91MB
- 03.Working with Custom Data Types/05.Multidimensional Arrays.mp42.16MB
- 03.Working with Custom Data Types/04.Subtypes.mp42.29MB
- 04.Monitoring Signal States with Attributes/08.Summary.mp42.5MB
- 06.Constructing State Machines/02.What Is a State Machine.mp42.68MB
- 03.Working with Custom Data Types/06.Record Types.mp43.1MB
- 02.Developing for the FPGA/01.Course Overview.mp43.46MB
- 02.Developing for the FPGA/03.VHDL Design Flow.mp43.47MB
- 01.Course Overview/01.Course Overview.mp43.64MB
- 04.Monitoring Signal States with Attributes/05.Signal Kind Attributes.mp43.86MB
- 03.Working with Custom Data Types/07.Physical Types.mp44.14MB
- 02.Developing for the FPGA/06.High-level Synthesis.mp44.17MB
- 05.Keeping Code Organized with Subprograms and Packages/02.Design Unit Recap.mp44.22MB
- 04.Monitoring Signal States with Attributes/07.User-defined Attributes.mp44.32MB
- 05.Keeping Code Organized with Subprograms and Packages/04.Constants.mp44.79MB
- 02.Developing for the FPGA/04.Compilation Process.mp45.31MB
- 03.Working with Custom Data Types/02.Standard Data Types Recap.mp46.24MB
- 04.Monitoring Signal States with Attributes/03.Value Kind Attributes.mp47.17MB
- 07.Testing Your Designs/02.Testing and Testbenches.mp47.7MB
- 03.Working with Custom Data Types/03.Arrays and Ranges.mp410.35MB
- 05.Keeping Code Organized with Subprograms and Packages/03.Procedures.mp410.39MB
- 06.Constructing State Machines/06.State Encoding Styles.mp413.28MB
- 04.Monitoring Signal States with Attributes/04.Function Kind Attributes.mp415.06MB
- 02.Developing for the FPGA/07.Demo - MATLAB HDL Coder.mp422.38MB
- 07.Testing Your Designs/03.A Sample Testbench.mp425.45MB
- 02.Developing for the FPGA/05.Demo - Compilation Report.mp425.52MB
- 07.Testing Your Designs/04.Testing with VUnit.mp429.41MB
- 06.Constructing State Machines/04.Demo - Traffic Lights (Moore).mp439.59MB
- 05.Keeping Code Organized with Subprograms and Packages/06.Resolution Functions.mp440.9MB
- 05.Keeping Code Organized with Subprograms and Packages/05.Generics.mp448.03MB
- 06.Constructing State Machines/05.Demo - Combination Lock (Mealy).mp459.91MB
- 03.Working with Custom Data Types/08.Demo.mp480.23MB
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